erigon-pulse/cmd/erigon-cl/core
Victor Shyba 158fb2b606
Optimize memory buffer, simplify set32, use sha256-simd (#7060)
Hi,

I'm syncing Gnosis on a Celeron N5100 to get familiar with the codebase.
In the process I managed to optimize some things from profiling.
Since I'm not yet on the project Discord, I decided to open this PR as a
suggestion. This pass all tests here and gave me a nice boost for that
platform, although I didn't have time to benchmark it yet.

* reuse VM Memory objects with sync.Pool. It starts with 4k as `evmone`
[code
suggested](0897edb001/lib/evmone/execution_state.hpp (L49))
as a good value.
* set32 simplification: mostly cosmetic
* sha256-simd: Celeron has SHA instructions. We should probably do the
same for torrent later, but this already helped as it is very CPU bound
on such a low end processor. Maybe that helps ARM as well.
2023-03-14 07:17:04 +00:00
..
rawdb Added Capella specs support to Erigon-CL (#7051) 2023-03-07 21:57:18 +00:00
state Optimize memory buffer, simplify set32, use sha256-simd (#7060) 2023-03-14 07:17:04 +00:00
transition Added hard fork transition support to Erigon-CL. (#7088) 2023-03-13 12:10:36 +00:00
checkpoint.go Added working slot processing. (#6779) 2023-02-05 21:53:59 +01:00