Merge branch 'ib-amlogic-a4' into devel

Merge immutable branch into devel for next.

Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
This commit is contained in:
Linus Walleij 2025-02-28 00:03:55 +01:00
commit 3f11be833b
9 changed files with 1383 additions and 0 deletions

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@ -0,0 +1,126 @@
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/pinctrl/amlogic,pinctrl-a4.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Amlogic pinmux controller
maintainers:
- Xianwei Zhao <xianwei.zhao@amlogic.com>
allOf:
- $ref: pinctrl.yaml#
properties:
compatible:
const: amlogic,pinctrl-a4
"#address-cells":
const: 2
"#size-cells":
const: 2
ranges: true
patternProperties:
"^gpio@[0-9a-f]+$":
type: object
additionalProperties: false
properties:
reg:
minItems: 1
items:
- description: pin config register
- description: pin mux setting register (some special pin fixed function)
- description: pin drive strength register (optional)
reg-names:
minItems: 1
items:
- const: gpio
- const: mux
- const: ds
gpio-controller: true
"#gpio-cells":
const: 2
gpio-ranges:
maxItems: 1
required:
- reg
- reg-names
- gpio-controller
- "#gpio-cells"
- gpio-ranges
"^func-[0-9a-z-]+$":
type: object
additionalProperties: false
patternProperties:
"^group-[0-9a-z-]+$":
type: object
allOf:
- $ref: /schemas/pinctrl/pincfg-node.yaml
- $ref: /schemas/pinctrl/pinmux-node.yaml
required:
- pinmux
required:
- compatible
- "#address-cells"
- "#size-cells"
- ranges
additionalProperties: false
examples:
- |
#include <dt-bindings/pinctrl/amlogic,pinctrl.h>
apb {
#address-cells = <2>;
#size-cells = <2>;
periphs_pinctrl: pinctrl {
compatible = "amlogic,pinctrl-a4";
#address-cells = <2>;
#size-cells = <2>;
ranges;
gpio@4240 {
reg = <0 0x4240 0 0x40>, <0 0x4000 0 0x8>;
reg-names = "gpio", "mux";
gpio-controller;
#gpio-cells = <2>;
gpio-ranges = <&periphs_pinctrl 0 8 10>;
};
func-uart-b {
group-default {
pinmux = <AML_PINMUX(AMLOGIC_GPIO_B, 1, 4)>;
bias-pull-up;
drive-strength-microamp = <4000>;
};
group-pins1 {
pinmux = <AML_PINMUX(AMLOGIC_GPIO_B, 5, 2)>;
bias-pull-up;
drive-strength-microamp = <4000>;
};
};
func-uart-c {
group-default {
pinmux = <AML_PINMUX(AMLOGIC_GPIO_B, 3, 1)>,
<AML_PINMUX(AMLOGIC_GPIO_B, 2, 1)>;
bias-pull-up;
drive-strength-microamp = <4000>;
};
};
};
};

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@ -1250,6 +1250,14 @@ F: Documentation/devicetree/bindings/perf/amlogic,g12-ddr-pmu.yaml
F: drivers/perf/amlogic/
F: include/soc/amlogic/
AMLOGIC PINCTRL DRIVER
M: Xianwei Zhao <xianwei.zhao@amlogic.com>
L: linux-amlogic@lists.infradead.org
L: linux-gpio@vger.kernel.org
S: Maintained
F: Documentation/devicetree/bindings/pinctrl/amlogic,pinctrl-a4.yaml
F: drivers/pinctrl/meson/pinctrl-amlogic-a4.c
AMLOGIC RTC DRIVER
M: Yiting Deng <yiting.deng@amlogic.com>
M: Xianwei Zhao <xianwei.zhao@amlogic.com>

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@ -67,6 +67,17 @@ config PINCTRL_MESON_S4
select PINCTRL_MESON_AXG_PMX
default y
config PINCTRL_AMLOGIC_A4
bool "AMLOGIC pincontrol"
depends on ARM64
default y
help
This is the driver for the pin controller found on Amlogic SoCs.
This driver is simplify subsequent support for new amlogic SoCs,
to support new Amlogic SoCs, only need to add the corresponding dts file,
no additional binding header files or C file are added.
config PINCTRL_AMLOGIC_C3
tristate "Amlogic C3 SoC pinctrl driver"
depends on ARM64

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@ -10,5 +10,6 @@ obj-$(CONFIG_PINCTRL_MESON_AXG) += pinctrl-meson-axg.o
obj-$(CONFIG_PINCTRL_MESON_G12A) += pinctrl-meson-g12a.o
obj-$(CONFIG_PINCTRL_MESON_A1) += pinctrl-meson-a1.o
obj-$(CONFIG_PINCTRL_MESON_S4) += pinctrl-meson-s4.o
obj-$(CONFIG_PINCTRL_AMLOGIC_A4) += pinctrl-amlogic-a4.o
obj-$(CONFIG_PINCTRL_AMLOGIC_C3) += pinctrl-amlogic-c3.o
obj-$(CONFIG_PINCTRL_AMLOGIC_T7) += pinctrl-amlogic-t7.o

File diff suppressed because it is too large Load Diff

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@ -233,6 +233,67 @@ static void parse_dt_cfg(struct device_node *np,
}
}
/**
* pinconf_generic_parse_dt_pinmux()
* parse the pinmux properties into generic pin mux values.
* @np: node containing the pinmux properties
* @dev: pincontrol core device
* @pid: array with pin identity entries
* @pmux: array with pin mux value entries
* @npins: number of pins
*
* pinmux propertity: mux value [0,7]bits and pin identity [8,31]bits.
*/
int pinconf_generic_parse_dt_pinmux(struct device_node *np, struct device *dev,
unsigned int **pid, unsigned int **pmux,
unsigned int *npins)
{
unsigned int *pid_t;
unsigned int *pmux_t;
struct property *prop;
unsigned int npins_t, i;
u32 value;
int ret;
prop = of_find_property(np, "pinmux", NULL);
if (!prop) {
dev_info(dev, "Missing pinmux property\n");
return -ENOENT;
}
if (!pid || !pmux || !npins) {
dev_err(dev, "paramers error\n");
return -EINVAL;
}
npins_t = prop->length / sizeof(u32);
pid_t = devm_kcalloc(dev, npins_t, sizeof(*pid_t), GFP_KERNEL);
pmux_t = devm_kcalloc(dev, npins_t, sizeof(*pmux_t), GFP_KERNEL);
if (!pid_t || !pmux_t) {
dev_err(dev, "kalloc memory fail\n");
return -ENOMEM;
}
for (i = 0; i < npins_t; i++) {
ret = of_property_read_u32_index(np, "pinmux", i, &value);
if (ret) {
dev_err(dev, "get pinmux value fail\n");
goto exit;
}
pmux_t[i] = value & 0xff;
pid_t[i] = (value >> 8) & 0xffffff;
}
*pid = pid_t;
*pmux = pmux_t;
*npins = npins_t;
return 0;
exit:
devm_kfree(dev, pid_t);
devm_kfree(dev, pmux_t);
return ret;
}
EXPORT_SYMBOL_GPL(pinconf_generic_parse_dt_pinmux);
/**
* pinconf_generic_parse_dt_config()
* parse the config properties into generic pinconfig values.
@ -295,6 +356,75 @@ out:
}
EXPORT_SYMBOL_GPL(pinconf_generic_parse_dt_config);
int pinconf_generic_dt_node_to_map_pinmux(struct pinctrl_dev *pctldev,
struct device_node *np,
struct pinctrl_map **map,
unsigned int *num_maps)
{
struct device *dev = pctldev->dev;
struct device_node *pnode;
unsigned long *configs = NULL;
unsigned int num_configs = 0;
struct property *prop;
unsigned int reserved_maps;
int reserve;
int ret;
prop = of_find_property(np, "pinmux", NULL);
if (!prop) {
dev_info(dev, "Missing pinmux property\n");
return -ENOENT;
}
pnode = of_get_parent(np);
if (!pnode) {
dev_info(dev, "Missing function node\n");
return -EINVAL;
}
reserved_maps = 0;
*map = NULL;
*num_maps = 0;
ret = pinconf_generic_parse_dt_config(np, pctldev, &configs,
&num_configs);
if (ret < 0) {
dev_err(dev, "%pOF: could not parse node property\n", np);
return ret;
}
reserve = 1;
if (num_configs)
reserve++;
ret = pinctrl_utils_reserve_map(pctldev, map, &reserved_maps,
num_maps, reserve);
if (ret < 0)
goto exit;
ret = pinctrl_utils_add_map_mux(pctldev, map,
&reserved_maps, num_maps, np->name,
pnode->name);
if (ret < 0)
goto exit;
if (num_configs) {
ret = pinctrl_utils_add_map_configs(pctldev, map, &reserved_maps,
num_maps, np->name, configs,
num_configs, PIN_MAP_TYPE_CONFIGS_GROUP);
if (ret < 0)
goto exit;
}
exit:
kfree(configs);
if (ret)
pinctrl_utils_free_map(pctldev, *map, *num_maps);
return ret;
}
EXPORT_SYMBOL_GPL(pinconf_generic_dt_node_to_map_pinmux);
int pinconf_generic_dt_subnode_to_map(struct pinctrl_dev *pctldev,
struct device_node *np, struct pinctrl_map **map,
unsigned int *reserved_maps, unsigned int *num_maps,

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@ -138,4 +138,8 @@ int pinconf_generic_parse_dt_config(struct device_node *np,
struct pinctrl_dev *pctldev,
unsigned long **configs,
unsigned int *nconfigs);
int pinconf_generic_parse_dt_pinmux(struct device_node *np, struct device *dev,
unsigned int **pid, unsigned int **pmux,
unsigned int *npins);
#endif

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@ -0,0 +1,46 @@
/* SPDX-License-Identifier: (GPL-2.0-only OR MIT) */
/*
* Copyright (c) 2024 Amlogic, Inc. All rights reserved.
* Author: Xianwei Zhao <xianwei.zhao@amlogic.com>
*/
#ifndef _DT_BINDINGS_AMLOGIC_PINCTRL_H
#define _DT_BINDINGS_AMLOGIC_PINCTRL_H
/* Normal PIN bank */
#define AMLOGIC_GPIO_A 0
#define AMLOGIC_GPIO_B 1
#define AMLOGIC_GPIO_C 2
#define AMLOGIC_GPIO_D 3
#define AMLOGIC_GPIO_E 4
#define AMLOGIC_GPIO_F 5
#define AMLOGIC_GPIO_G 6
#define AMLOGIC_GPIO_H 7
#define AMLOGIC_GPIO_I 8
#define AMLOGIC_GPIO_J 9
#define AMLOGIC_GPIO_K 10
#define AMLOGIC_GPIO_L 11
#define AMLOGIC_GPIO_M 12
#define AMLOGIC_GPIO_N 13
#define AMLOGIC_GPIO_O 14
#define AMLOGIC_GPIO_P 15
#define AMLOGIC_GPIO_Q 16
#define AMLOGIC_GPIO_R 17
#define AMLOGIC_GPIO_S 18
#define AMLOGIC_GPIO_T 19
#define AMLOGIC_GPIO_U 20
#define AMLOGIC_GPIO_V 21
#define AMLOGIC_GPIO_W 22
#define AMLOGIC_GPIO_X 23
#define AMLOGIC_GPIO_Y 24
#define AMLOGIC_GPIO_Z 25
/* Special PIN bank */
#define AMLOGIC_GPIO_DV 26
#define AMLOGIC_GPIO_AO 27
#define AMLOGIC_GPIO_CC 28
#define AMLOGIC_GPIO_TEST_N 29
#define AMLOGIC_GPIO_ANALOG 30
#define AML_PINMUX(bank, offset, mode) (((((bank) << 8) + (offset)) << 8) | (mode))
#endif /* _DT_BINDINGS_AMLOGIC_PINCTRL_H */

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@ -232,4 +232,8 @@ static inline int pinconf_generic_dt_node_to_map_all(struct pinctrl_dev *pctldev
PIN_MAP_TYPE_INVALID);
}
int pinconf_generic_dt_node_to_map_pinmux(struct pinctrl_dev *pctldev,
struct device_node *np,
struct pinctrl_map **map,
unsigned int *num_maps);
#endif /* __LINUX_PINCTRL_PINCONF_GENERIC_H */