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spi: amlogic-spifc-a1: Support per spi-mem operation frequency switches
Every ->exec_op() call correctly configures the spi bus speed to the maximum allowed frequency for the memory using the constant spi default parameter. Since we can now have per-operation constraints, let's use the value that comes from the spi-mem operation structure instead. In case there is no specific limitation for this operation, the default spi device value will be given anyway. The per-operation frequency capability is thus advertised to the spi-mem core. Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Link: https://patch.msgid.link/20241224-winbond-6-11-rc1-quad-support-v2-5-ad218dbc406f@bootlin.com Signed-off-by: Mark Brown <broonie@kernel.org>
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@ -259,7 +259,7 @@ static int amlogic_spifc_a1_exec_op(struct spi_mem *mem,
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size_t data_size = op->data.nbytes;
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int ret;
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ret = amlogic_spifc_a1_set_freq(spifc, mem->spi->max_speed_hz);
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ret = amlogic_spifc_a1_set_freq(spifc, op->max_freq);
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if (ret)
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return ret;
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@ -320,6 +320,10 @@ static const struct spi_controller_mem_ops amlogic_spifc_a1_mem_ops = {
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.adjust_op_size = amlogic_spifc_a1_adjust_op_size,
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};
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static const struct spi_controller_mem_caps amlogic_spifc_a1_mem_caps = {
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.per_op_freq = true,
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};
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static int amlogic_spifc_a1_probe(struct platform_device *pdev)
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{
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struct spi_controller *ctrl;
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@ -356,6 +360,7 @@ static int amlogic_spifc_a1_probe(struct platform_device *pdev)
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ctrl->bits_per_word_mask = SPI_BPW_MASK(8);
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ctrl->auto_runtime_pm = true;
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ctrl->mem_ops = &amlogic_spifc_a1_mem_ops;
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ctrl->mem_caps = &amlogic_spifc_a1_mem_caps;
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ctrl->min_speed_hz = SPIFC_A1_MIN_HZ;
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ctrl->max_speed_hz = SPIFC_A1_MAX_HZ;
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ctrl->mode_bits = (SPI_RX_DUAL | SPI_TX_DUAL |
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