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iommu: Sort out domain user data
When DMA/MSI cookies were made first-class citizens back in commit 46983fcd67ac ("iommu: Pull IOVA cookie management into the core"), there was no real need to further expose the two different cookie types. However, now that IOMMUFD wants to add a third type of MSI-mapping cookie, we do have a nicely compelling reason to properly dismabiguate things at the domain level beyond just vaguely guessing from the domain type. Meanwhile, we also effectively have another "cookie" in the form of the anonymous union for other user data, which isn't much better in terms of being vague and unenforced. The fact is that all these cookie types are mutually exclusive, in the sense that combining them makes zero sense and/or would be catastrophic (iommu_set_fault_handler() on an SVA domain, anyone?) - the only combination which *might* be reasonable is perhaps a fault handler and an MSI cookie, but nobody's doing that at the moment, so let's rule it out as well for the sake of being clear and robust. To that end, we pull DMA and MSI cookies apart a little more, mostly to clear up the ambiguity at domain teardown, then for clarity (and to save a little space), move them into the union, whose ownership we can then properly describe and enforce entirely unambiguously. [nicolinc: rebase on latest tree; use prefix IOMMU_COOKIE_; merge unions in iommu_domain; add IOMMU_COOKIE_IOMMUFD for iommufd_hwpt] Link: https://patch.msgid.link/r/1ace9076c95204bbe193ee77499d395f15f44b23.1742871535.git.nicolinc@nvidia.com Signed-off-by: Robin Murphy <robin.murphy@arm.com> Reviewed-by: Kevin Tian <kevin.tian@intel.com> Signed-off-by: Nicolin Chen <nicolinc@nvidia.com> Reviewed-by: Jason Gunthorpe <jgg@nvidia.com> Signed-off-by: Jason Gunthorpe <jgg@nvidia.com>
This commit is contained in:
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commit
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@ -42,11 +42,6 @@ struct iommu_dma_msi_page {
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phys_addr_t phys;
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};
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enum iommu_dma_cookie_type {
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IOMMU_DMA_IOVA_COOKIE,
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IOMMU_DMA_MSI_COOKIE,
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};
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enum iommu_dma_queue_type {
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IOMMU_DMA_OPTS_PER_CPU_QUEUE,
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IOMMU_DMA_OPTS_SINGLE_QUEUE,
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@ -59,35 +54,31 @@ struct iommu_dma_options {
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};
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struct iommu_dma_cookie {
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enum iommu_dma_cookie_type type;
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struct iova_domain iovad;
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struct list_head msi_page_list;
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/* Flush queue */
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union {
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/* Full allocator for IOMMU_DMA_IOVA_COOKIE */
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struct {
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struct iova_domain iovad;
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/* Flush queue */
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union {
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struct iova_fq *single_fq;
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struct iova_fq __percpu *percpu_fq;
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};
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/* Number of TLB flushes that have been started */
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atomic64_t fq_flush_start_cnt;
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/* Number of TLB flushes that have been finished */
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atomic64_t fq_flush_finish_cnt;
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/* Timer to regularily empty the flush queues */
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struct timer_list fq_timer;
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/* 1 when timer is active, 0 when not */
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atomic_t fq_timer_on;
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};
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/* Trivial linear page allocator for IOMMU_DMA_MSI_COOKIE */
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dma_addr_t msi_iova;
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struct iova_fq *single_fq;
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struct iova_fq __percpu *percpu_fq;
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};
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struct list_head msi_page_list;
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/* Number of TLB flushes that have been started */
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atomic64_t fq_flush_start_cnt;
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/* Number of TLB flushes that have been finished */
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atomic64_t fq_flush_finish_cnt;
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/* Timer to regularily empty the flush queues */
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struct timer_list fq_timer;
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/* 1 when timer is active, 0 when not */
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atomic_t fq_timer_on;
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/* Domain for flush queue callback; NULL if flush queue not in use */
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struct iommu_domain *fq_domain;
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struct iommu_domain *fq_domain;
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/* Options for dma-iommu use */
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struct iommu_dma_options options;
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struct mutex mutex;
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struct iommu_dma_options options;
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struct mutex mutex;
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};
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struct iommu_dma_msi_cookie {
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dma_addr_t msi_iova;
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struct list_head msi_page_list;
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};
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static DEFINE_STATIC_KEY_FALSE(iommu_deferred_attach_enabled);
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@ -369,40 +360,26 @@ int iommu_dma_init_fq(struct iommu_domain *domain)
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return 0;
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}
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static inline size_t cookie_msi_granule(struct iommu_dma_cookie *cookie)
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{
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if (cookie->type == IOMMU_DMA_IOVA_COOKIE)
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return cookie->iovad.granule;
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return PAGE_SIZE;
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}
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static struct iommu_dma_cookie *cookie_alloc(enum iommu_dma_cookie_type type)
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{
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struct iommu_dma_cookie *cookie;
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cookie = kzalloc(sizeof(*cookie), GFP_KERNEL);
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if (cookie) {
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INIT_LIST_HEAD(&cookie->msi_page_list);
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cookie->type = type;
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}
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return cookie;
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}
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/**
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* iommu_get_dma_cookie - Acquire DMA-API resources for a domain
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* @domain: IOMMU domain to prepare for DMA-API usage
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*/
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int iommu_get_dma_cookie(struct iommu_domain *domain)
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{
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if (domain->iova_cookie)
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struct iommu_dma_cookie *cookie;
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if (domain->cookie_type != IOMMU_COOKIE_NONE)
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return -EEXIST;
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domain->iova_cookie = cookie_alloc(IOMMU_DMA_IOVA_COOKIE);
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if (!domain->iova_cookie)
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cookie = kzalloc(sizeof(*cookie), GFP_KERNEL);
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if (!cookie)
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return -ENOMEM;
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mutex_init(&domain->iova_cookie->mutex);
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mutex_init(&cookie->mutex);
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INIT_LIST_HEAD(&cookie->msi_page_list);
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iommu_domain_set_sw_msi(domain, iommu_dma_sw_msi);
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domain->cookie_type = IOMMU_COOKIE_DMA_IOVA;
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domain->iova_cookie = cookie;
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return 0;
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}
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@ -420,29 +397,30 @@ int iommu_get_dma_cookie(struct iommu_domain *domain)
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*/
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int iommu_get_msi_cookie(struct iommu_domain *domain, dma_addr_t base)
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{
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struct iommu_dma_cookie *cookie;
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struct iommu_dma_msi_cookie *cookie;
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if (domain->type != IOMMU_DOMAIN_UNMANAGED)
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return -EINVAL;
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if (domain->iova_cookie)
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if (domain->cookie_type != IOMMU_COOKIE_NONE)
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return -EEXIST;
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cookie = cookie_alloc(IOMMU_DMA_MSI_COOKIE);
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cookie = kzalloc(sizeof(*cookie), GFP_KERNEL);
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if (!cookie)
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return -ENOMEM;
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cookie->msi_iova = base;
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domain->iova_cookie = cookie;
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INIT_LIST_HEAD(&cookie->msi_page_list);
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iommu_domain_set_sw_msi(domain, iommu_dma_sw_msi);
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domain->cookie_type = IOMMU_COOKIE_DMA_MSI;
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domain->msi_cookie = cookie;
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return 0;
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}
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EXPORT_SYMBOL(iommu_get_msi_cookie);
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/**
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* iommu_put_dma_cookie - Release a domain's DMA mapping resources
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* @domain: IOMMU domain previously prepared by iommu_get_dma_cookie() or
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* iommu_get_msi_cookie()
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* @domain: IOMMU domain previously prepared by iommu_get_dma_cookie()
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*/
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void iommu_put_dma_cookie(struct iommu_domain *domain)
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{
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@ -454,20 +432,27 @@ void iommu_put_dma_cookie(struct iommu_domain *domain)
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return;
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#endif
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if (!cookie)
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return;
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if (cookie->type == IOMMU_DMA_IOVA_COOKIE && cookie->iovad.granule) {
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if (cookie->iovad.granule) {
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iommu_dma_free_fq(cookie);
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put_iova_domain(&cookie->iovad);
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}
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list_for_each_entry_safe(msi, tmp, &cookie->msi_page_list, list) {
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list_del(&msi->list);
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list_for_each_entry_safe(msi, tmp, &cookie->msi_page_list, list)
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kfree(msi);
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kfree(cookie);
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}
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/**
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* iommu_put_msi_cookie - Release a domain's MSI mapping resources
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* @domain: IOMMU domain previously prepared by iommu_get_msi_cookie()
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*/
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void iommu_put_msi_cookie(struct iommu_domain *domain)
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{
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struct iommu_dma_msi_cookie *cookie = domain->msi_cookie;
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struct iommu_dma_msi_page *msi, *tmp;
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list_for_each_entry_safe(msi, tmp, &cookie->msi_page_list, list)
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kfree(msi);
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}
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kfree(cookie);
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domain->iova_cookie = NULL;
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}
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/**
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@ -687,7 +672,7 @@ static int iommu_dma_init_domain(struct iommu_domain *domain, struct device *dev
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struct iova_domain *iovad;
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int ret;
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if (!cookie || cookie->type != IOMMU_DMA_IOVA_COOKIE)
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if (!cookie || domain->cookie_type != IOMMU_COOKIE_DMA_IOVA)
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return -EINVAL;
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iovad = &cookie->iovad;
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@ -777,9 +762,9 @@ static dma_addr_t iommu_dma_alloc_iova(struct iommu_domain *domain,
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struct iova_domain *iovad = &cookie->iovad;
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unsigned long shift, iova_len, iova;
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if (cookie->type == IOMMU_DMA_MSI_COOKIE) {
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cookie->msi_iova += size;
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return cookie->msi_iova - size;
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if (domain->cookie_type == IOMMU_COOKIE_DMA_MSI) {
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domain->msi_cookie->msi_iova += size;
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return domain->msi_cookie->msi_iova - size;
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}
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shift = iova_shift(iovad);
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@ -816,16 +801,16 @@ done:
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return (dma_addr_t)iova << shift;
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}
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static void iommu_dma_free_iova(struct iommu_dma_cookie *cookie,
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dma_addr_t iova, size_t size, struct iommu_iotlb_gather *gather)
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static void iommu_dma_free_iova(struct iommu_domain *domain, dma_addr_t iova,
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size_t size, struct iommu_iotlb_gather *gather)
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{
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struct iova_domain *iovad = &cookie->iovad;
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struct iova_domain *iovad = &domain->iova_cookie->iovad;
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/* The MSI case is only ever cleaning up its most recent allocation */
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if (cookie->type == IOMMU_DMA_MSI_COOKIE)
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cookie->msi_iova -= size;
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if (domain->cookie_type == IOMMU_COOKIE_DMA_MSI)
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domain->msi_cookie->msi_iova -= size;
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else if (gather && gather->queued)
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queue_iova(cookie, iova_pfn(iovad, iova),
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queue_iova(domain->iova_cookie, iova_pfn(iovad, iova),
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size >> iova_shift(iovad),
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&gather->freelist);
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else
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@ -853,7 +838,7 @@ static void __iommu_dma_unmap(struct device *dev, dma_addr_t dma_addr,
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if (!iotlb_gather.queued)
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iommu_iotlb_sync(domain, &iotlb_gather);
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iommu_dma_free_iova(cookie, dma_addr, size, &iotlb_gather);
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iommu_dma_free_iova(domain, dma_addr, size, &iotlb_gather);
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}
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static dma_addr_t __iommu_dma_map(struct device *dev, phys_addr_t phys,
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@ -881,7 +866,7 @@ static dma_addr_t __iommu_dma_map(struct device *dev, phys_addr_t phys,
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return DMA_MAPPING_ERROR;
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if (iommu_map(domain, iova, phys - iova_off, size, prot, GFP_ATOMIC)) {
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iommu_dma_free_iova(cookie, iova, size, NULL);
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iommu_dma_free_iova(domain, iova, size, NULL);
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return DMA_MAPPING_ERROR;
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}
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return iova + iova_off;
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@ -1018,7 +1003,7 @@ static struct page **__iommu_dma_alloc_noncontiguous(struct device *dev,
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out_free_sg:
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sg_free_table(sgt);
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out_free_iova:
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iommu_dma_free_iova(cookie, iova, size, NULL);
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iommu_dma_free_iova(domain, iova, size, NULL);
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out_free_pages:
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__iommu_dma_free_pages(pages, count);
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return NULL;
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@ -1495,7 +1480,7 @@ int iommu_dma_map_sg(struct device *dev, struct scatterlist *sg, int nents,
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return __finalise_sg(dev, sg, nents, iova);
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out_free_iova:
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iommu_dma_free_iova(cookie, iova, iova_len, NULL);
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iommu_dma_free_iova(domain, iova, iova_len, NULL);
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out_restore_sg:
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__invalidate_sg(sg, nents);
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out:
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@ -1773,17 +1758,47 @@ out_err:
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dev->dma_iommu = false;
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}
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static bool has_msi_cookie(const struct iommu_domain *domain)
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{
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return domain && (domain->cookie_type == IOMMU_COOKIE_DMA_IOVA ||
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domain->cookie_type == IOMMU_COOKIE_DMA_MSI);
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}
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static size_t cookie_msi_granule(const struct iommu_domain *domain)
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{
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switch (domain->cookie_type) {
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case IOMMU_COOKIE_DMA_IOVA:
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return domain->iova_cookie->iovad.granule;
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case IOMMU_COOKIE_DMA_MSI:
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return PAGE_SIZE;
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default:
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unreachable();
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};
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}
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static struct list_head *cookie_msi_pages(const struct iommu_domain *domain)
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{
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switch (domain->cookie_type) {
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case IOMMU_COOKIE_DMA_IOVA:
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return &domain->iova_cookie->msi_page_list;
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case IOMMU_COOKIE_DMA_MSI:
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return &domain->msi_cookie->msi_page_list;
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default:
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unreachable();
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};
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}
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static struct iommu_dma_msi_page *iommu_dma_get_msi_page(struct device *dev,
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phys_addr_t msi_addr, struct iommu_domain *domain)
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{
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struct iommu_dma_cookie *cookie = domain->iova_cookie;
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struct list_head *msi_page_list = cookie_msi_pages(domain);
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struct iommu_dma_msi_page *msi_page;
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dma_addr_t iova;
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int prot = IOMMU_WRITE | IOMMU_NOEXEC | IOMMU_MMIO;
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size_t size = cookie_msi_granule(cookie);
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size_t size = cookie_msi_granule(domain);
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msi_addr &= ~(phys_addr_t)(size - 1);
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list_for_each_entry(msi_page, &cookie->msi_page_list, list)
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list_for_each_entry(msi_page, msi_page_list, list)
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if (msi_page->phys == msi_addr)
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return msi_page;
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@ -1801,11 +1816,11 @@ static struct iommu_dma_msi_page *iommu_dma_get_msi_page(struct device *dev,
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INIT_LIST_HEAD(&msi_page->list);
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msi_page->phys = msi_addr;
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msi_page->iova = iova;
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list_add(&msi_page->list, &cookie->msi_page_list);
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list_add(&msi_page->list, msi_page_list);
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return msi_page;
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out_free_iova:
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iommu_dma_free_iova(cookie, iova, size, NULL);
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iommu_dma_free_iova(domain, iova, size, NULL);
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out_free_page:
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kfree(msi_page);
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return NULL;
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@ -1817,7 +1832,7 @@ static int iommu_dma_sw_msi(struct iommu_domain *domain, struct msi_desc *desc,
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struct device *dev = msi_desc_to_dev(desc);
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const struct iommu_dma_msi_page *msi_page;
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if (!domain->iova_cookie) {
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if (!has_msi_cookie(domain)) {
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msi_desc_set_iommu_msi_iova(desc, 0, 0);
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return 0;
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}
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@ -1827,9 +1842,8 @@ static int iommu_dma_sw_msi(struct iommu_domain *domain, struct msi_desc *desc,
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if (!msi_page)
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return -ENOMEM;
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msi_desc_set_iommu_msi_iova(
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desc, msi_page->iova,
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ilog2(cookie_msi_granule(domain->iova_cookie)));
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msi_desc_set_iommu_msi_iova(desc, msi_page->iova,
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ilog2(cookie_msi_granule(domain)));
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return 0;
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}
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@ -13,6 +13,7 @@ void iommu_setup_dma_ops(struct device *dev);
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int iommu_get_dma_cookie(struct iommu_domain *domain);
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void iommu_put_dma_cookie(struct iommu_domain *domain);
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void iommu_put_msi_cookie(struct iommu_domain *domain);
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int iommu_dma_init_fq(struct iommu_domain *domain);
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@ -40,6 +41,10 @@ static inline void iommu_put_dma_cookie(struct iommu_domain *domain)
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{
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}
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static inline void iommu_put_msi_cookie(struct iommu_domain *domain)
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{
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}
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static inline void iommu_dma_get_resv_regions(struct device *dev, struct list_head *list)
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{
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}
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@ -310,6 +310,7 @@ static struct iommu_domain *iommu_sva_domain_alloc(struct device *dev,
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}
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domain->type = IOMMU_DOMAIN_SVA;
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domain->cookie_type = IOMMU_COOKIE_SVA;
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mmgrab(mm);
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domain->mm = mm;
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domain->owner = ops;
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@ -1953,8 +1953,10 @@ void iommu_set_fault_handler(struct iommu_domain *domain,
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iommu_fault_handler_t handler,
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void *token)
|
||||
{
|
||||
BUG_ON(!domain);
|
||||
if (WARN_ON(!domain || domain->cookie_type != IOMMU_COOKIE_NONE))
|
||||
return;
|
||||
|
||||
domain->cookie_type = IOMMU_COOKIE_FAULT_HANDLER;
|
||||
domain->handler = handler;
|
||||
domain->handler_token = token;
|
||||
}
|
||||
@ -2024,9 +2026,19 @@ EXPORT_SYMBOL_GPL(iommu_paging_domain_alloc_flags);
|
||||
|
||||
void iommu_domain_free(struct iommu_domain *domain)
|
||||
{
|
||||
if (domain->type == IOMMU_DOMAIN_SVA)
|
||||
switch (domain->cookie_type) {
|
||||
case IOMMU_COOKIE_DMA_IOVA:
|
||||
iommu_put_dma_cookie(domain);
|
||||
break;
|
||||
case IOMMU_COOKIE_DMA_MSI:
|
||||
iommu_put_msi_cookie(domain);
|
||||
break;
|
||||
case IOMMU_COOKIE_SVA:
|
||||
mmdrop(domain->mm);
|
||||
iommu_put_dma_cookie(domain);
|
||||
break;
|
||||
default:
|
||||
break;
|
||||
}
|
||||
if (domain->ops->free)
|
||||
domain->ops->free(domain);
|
||||
}
|
||||
|
@ -160,6 +160,7 @@ iommufd_hwpt_paging_alloc(struct iommufd_ctx *ictx, struct iommufd_ioas *ioas,
|
||||
}
|
||||
}
|
||||
hwpt->domain->iommufd_hwpt = hwpt;
|
||||
hwpt->domain->cookie_type = IOMMU_COOKIE_IOMMUFD;
|
||||
iommu_domain_set_sw_msi(hwpt->domain, iommufd_sw_msi);
|
||||
|
||||
/*
|
||||
@ -257,6 +258,7 @@ iommufd_hwpt_nested_alloc(struct iommufd_ctx *ictx,
|
||||
}
|
||||
hwpt->domain->owner = ops;
|
||||
hwpt->domain->iommufd_hwpt = hwpt;
|
||||
hwpt->domain->cookie_type = IOMMU_COOKIE_IOMMUFD;
|
||||
iommu_domain_set_sw_msi(hwpt->domain, iommufd_sw_msi);
|
||||
|
||||
if (WARN_ON_ONCE(hwpt->domain->type != IOMMU_DOMAIN_NESTED)) {
|
||||
@ -315,6 +317,7 @@ iommufd_viommu_alloc_hwpt_nested(struct iommufd_viommu *viommu, u32 flags,
|
||||
}
|
||||
hwpt->domain->iommufd_hwpt = hwpt;
|
||||
hwpt->domain->owner = viommu->iommu_dev->ops;
|
||||
hwpt->domain->cookie_type = IOMMU_COOKIE_IOMMUFD;
|
||||
iommu_domain_set_sw_msi(hwpt->domain, iommufd_sw_msi);
|
||||
|
||||
if (WARN_ON_ONCE(hwpt->domain->type != IOMMU_DOMAIN_NESTED)) {
|
||||
|
@ -41,6 +41,7 @@ struct iommu_dirty_ops;
|
||||
struct notifier_block;
|
||||
struct iommu_sva;
|
||||
struct iommu_dma_cookie;
|
||||
struct iommu_dma_msi_cookie;
|
||||
struct iommu_fault_param;
|
||||
struct iommufd_ctx;
|
||||
struct iommufd_viommu;
|
||||
@ -165,6 +166,15 @@ struct iommu_domain_geometry {
|
||||
bool force_aperture; /* DMA only allowed in mappable range? */
|
||||
};
|
||||
|
||||
enum iommu_domain_cookie_type {
|
||||
IOMMU_COOKIE_NONE,
|
||||
IOMMU_COOKIE_DMA_IOVA,
|
||||
IOMMU_COOKIE_DMA_MSI,
|
||||
IOMMU_COOKIE_FAULT_HANDLER,
|
||||
IOMMU_COOKIE_SVA,
|
||||
IOMMU_COOKIE_IOMMUFD,
|
||||
};
|
||||
|
||||
/* Domain feature flags */
|
||||
#define __IOMMU_DOMAIN_PAGING (1U << 0) /* Support for iommu_map/unmap */
|
||||
#define __IOMMU_DOMAIN_DMA_API (1U << 1) /* Domain for use in DMA-API
|
||||
@ -211,12 +221,12 @@ struct iommu_domain_geometry {
|
||||
|
||||
struct iommu_domain {
|
||||
unsigned type;
|
||||
enum iommu_domain_cookie_type cookie_type;
|
||||
const struct iommu_domain_ops *ops;
|
||||
const struct iommu_dirty_ops *dirty_ops;
|
||||
const struct iommu_ops *owner; /* Whose domain_alloc we came from */
|
||||
unsigned long pgsize_bitmap; /* Bitmap of page sizes in use */
|
||||
struct iommu_domain_geometry geometry;
|
||||
struct iommu_dma_cookie *iova_cookie;
|
||||
int (*iopf_handler)(struct iopf_group *group);
|
||||
|
||||
#if IS_ENABLED(CONFIG_IRQ_MSI_IOMMU)
|
||||
@ -224,10 +234,10 @@ struct iommu_domain {
|
||||
phys_addr_t msi_addr);
|
||||
#endif
|
||||
|
||||
union { /* Pointer usable by owner of the domain */
|
||||
struct iommufd_hw_pagetable *iommufd_hwpt; /* iommufd */
|
||||
};
|
||||
union { /* Fault handler */
|
||||
union { /* cookie */
|
||||
struct iommu_dma_cookie *iova_cookie;
|
||||
struct iommu_dma_msi_cookie *msi_cookie;
|
||||
struct iommufd_hw_pagetable *iommufd_hwpt;
|
||||
struct {
|
||||
iommu_fault_handler_t handler;
|
||||
void *handler_token;
|
||||
|
Loading…
x
Reference in New Issue
Block a user