soundwire: mipi_disco: read lane mapping properties from ACPI

The DisCo for SoundWire 2.0 added support for the
'mipi-sdw-lane-<n>-mapping' property.

Co-developed-by: Chao Song <chao.song@linux.intel.com>
Signed-off-by: Chao Song <chao.song@linux.intel.com>
Signed-off-by: Bard Liao <yung-chuan.liao@linux.intel.com>
Link: https://lore.kernel.org/r/20241218080155.102405-3-yung-chuan.liao@linux.intel.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
This commit is contained in:
Bard Liao 2024-12-18 16:01:43 +08:00 committed by Vinod Koul
parent 6bba2d3f74
commit 7533d0df69
2 changed files with 44 additions and 1 deletions

View File

@ -366,6 +366,44 @@ static int sdw_slave_read_dpn(struct sdw_slave *slave,
return 0;
}
/*
* In MIPI DisCo spec for SoundWire, lane mapping for a slave device is done with
* mipi-sdw-lane-x-mapping properties, where x is 1..7, and the values for those
* properties are mipi-sdw-manager-lane-x or mipi-sdw-peripheral-link-y, where x
* is an integer between 1 to 7 if the lane is connected to a manager lane, y is a
* character between A to E if the lane is connected to another peripheral lane.
*/
int sdw_slave_read_lane_mapping(struct sdw_slave *slave)
{
struct sdw_slave_prop *prop = &slave->prop;
struct device *dev = &slave->dev;
char prop_name[30];
const char *prop_val;
size_t len;
int ret, i;
u8 lane;
for (i = 0; i < SDW_MAX_LANES; i++) {
snprintf(prop_name, sizeof(prop_name), "mipi-sdw-lane-%d-mapping", i);
ret = device_property_read_string(dev, prop_name, &prop_val);
if (ret)
continue;
len = strlen(prop_val);
if (len < 1)
return -EINVAL;
/* The last character is enough to identify the connection */
ret = kstrtou8(&prop_val[len - 1], 10, &lane);
if (ret)
return ret;
if (in_range(lane, 1, SDW_MAX_LANES - 1))
prop->lane_maps[i] = lane;
}
return 0;
}
EXPORT_SYMBOL(sdw_slave_read_lane_mapping);
/**
* sdw_slave_read_prop() - Read Slave properties
* @slave: SDW Slave
@ -486,6 +524,6 @@ int sdw_slave_read_prop(struct sdw_slave *slave)
sdw_slave_read_dpn(slave, prop->sink_dpn_prop, nval,
prop->sink_ports, "sink");
return 0;
return sdw_slave_read_lane_mapping(slave);
}
EXPORT_SYMBOL(sdw_slave_read_prop);

View File

@ -54,6 +54,8 @@ struct sdw_slave;
#define SDW_MAX_PORTS 15
#define SDW_VALID_PORT_RANGE(n) ((n) < SDW_MAX_PORTS && (n) >= 1)
#define SDW_MAX_LANES 8
enum {
SDW_PORT_DIRN_SINK = 0,
SDW_PORT_DIRN_SOURCE,
@ -356,6 +358,7 @@ struct sdw_dpn_prop {
* and masks are supported
* @commit_register_supported: is PCP_Commit register supported
* @scp_int1_mask: SCP_INT1_MASK desired settings
* @lane_maps: Lane mapping for the slave, only valid if lane_control_support is set
* @clock_reg_supported: the Peripheral implements the clock base and scale
* registers introduced with the SoundWire 1.2 specification. SDCA devices
* do not need to set this boolean property as the registers are required.
@ -385,6 +388,7 @@ struct sdw_slave_prop {
u32 sdca_interrupt_register_list;
u8 commit_register_supported;
u8 scp_int1_mask;
u8 lane_maps[SDW_MAX_LANES];
bool clock_reg_supported;
bool use_domain_irq;
};
@ -450,6 +454,7 @@ struct sdw_master_prop {
int sdw_master_read_prop(struct sdw_bus *bus);
int sdw_slave_read_prop(struct sdw_slave *slave);
int sdw_slave_read_lane_mapping(struct sdw_slave *slave);
/*
* SDW Slave Structures and APIs