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locking/atomic: arm: add preprocessor symbols
Some atomics can be implemented in several different ways, e.g. FULL/ACQUIRE/RELEASE ordered atomics can be implemented in terms of RELAXED atomics, and ACQUIRE/RELEASE/RELAXED can be implemented in terms of FULL ordered atomics. Other atomics are optional, and don't exist in some configurations (e.g. not all architectures implement the 128-bit cmpxchg ops). Subsequent patches will require that architectures define a preprocessor symbol for any atomic (or ordering variant) which is optional. This will make the fallback ifdeffery more robust, and simplify future changes. Add the required definitions to arch/arm. Signed-off-by: Mark Rutland <mark.rutland@arm.com> Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org> Reviewed-by: Kees Cook <keescook@chromium.org> Link: https://lore.kernel.org/r/20230605070124.3741859-7-mark.rutland@arm.com
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@ -197,6 +197,16 @@ static inline int arch_atomic_fetch_##op(int i, atomic_t *v) \
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return val; \
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}
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#define arch_atomic_add_return arch_atomic_add_return
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#define arch_atomic_sub_return arch_atomic_sub_return
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#define arch_atomic_fetch_add arch_atomic_fetch_add
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#define arch_atomic_fetch_sub arch_atomic_fetch_sub
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#define arch_atomic_fetch_and arch_atomic_fetch_and
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#define arch_atomic_fetch_andnot arch_atomic_fetch_andnot
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#define arch_atomic_fetch_or arch_atomic_fetch_or
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#define arch_atomic_fetch_xor arch_atomic_fetch_xor
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static inline int arch_atomic_cmpxchg(atomic_t *v, int old, int new)
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{
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int ret;
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@ -212,8 +222,6 @@ static inline int arch_atomic_cmpxchg(atomic_t *v, int old, int new)
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}
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#define arch_atomic_cmpxchg arch_atomic_cmpxchg
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#define arch_atomic_fetch_andnot arch_atomic_fetch_andnot
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#endif /* __LINUX_ARM_ARCH__ */
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#define ATOMIC_OPS(op, c_op, asm_op) \
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