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4bf9706923
Follow the patterns of the other architectures that use GENERIC_CPU_VULNERABILITIES for riscv to introduce the ghostwrite vulnerability and mitigation. The mitigation is to disable all vector which is accomplished by clearing the bit from the cpufeature field. Ghostwrite only affects thead c9xx CPUs that impelment xtheadvector, so the vulerability will only be mitigated on these CPUs. Signed-off-by: Charlie Jenkins <charlie@rivosinc.com> Tested-by: Yangyu Chen <cyy@cyyself.name> Link: https://lore.kernel.org/r/20241113-xtheadvector-v11-14-236c22791ef9@rivosinc.com Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>
61 lines
1.4 KiB
C
61 lines
1.4 KiB
C
// SPDX-License-Identifier: GPL-2.0
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/*
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* Copyright (C) 2024 Rivos Inc.
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*/
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#include <linux/cpu.h>
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#include <linux/device.h>
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#include <linux/sprintf.h>
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#include <asm/bugs.h>
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#include <asm/vendor_extensions/thead.h>
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static enum mitigation_state ghostwrite_state;
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void ghostwrite_set_vulnerable(void)
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{
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ghostwrite_state = VULNERABLE;
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}
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/*
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* Vendor extension alternatives will use the value set at the time of boot
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* alternative patching, thus this must be called before boot alternatives are
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* patched (and after extension probing) to be effective.
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*
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* Returns true if mitgated, false otherwise.
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*/
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bool ghostwrite_enable_mitigation(void)
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{
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if (IS_ENABLED(CONFIG_RISCV_ISA_XTHEADVECTOR) &&
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ghostwrite_state == VULNERABLE && !cpu_mitigations_off()) {
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disable_xtheadvector();
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ghostwrite_state = MITIGATED;
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return true;
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}
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return false;
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}
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enum mitigation_state ghostwrite_get_state(void)
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{
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return ghostwrite_state;
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}
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ssize_t cpu_show_ghostwrite(struct device *dev, struct device_attribute *attr, char *buf)
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{
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if (IS_ENABLED(CONFIG_RISCV_ISA_XTHEADVECTOR)) {
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switch (ghostwrite_state) {
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case UNAFFECTED:
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return sprintf(buf, "Not affected\n");
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case MITIGATED:
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return sprintf(buf, "Mitigation: xtheadvector disabled\n");
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case VULNERABLE:
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fallthrough;
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default:
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return sprintf(buf, "Vulnerable\n");
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}
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} else {
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return sprintf(buf, "Not affected\n");
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}
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}
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