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b076b995e2
SM6115 (and its derivatives or similar SoCs) has an LPASS clock controller block which provides audio-related resets. Add the required code to support them. [alexey.klimov] fixed compilation errors after rebase, slightly changed the commit message Cc: Konrad Dybcio <konradybcio@kernel.org> Cc: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> Cc: Srinivas Kandagatla <srinivas.kandagatla@linaro.org> Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org> Signed-off-by: Alexey Klimov <alexey.klimov@linaro.org> Link: https://lore.kernel.org/r/20241212002551.2902954-3-alexey.klimov@linaro.org Signed-off-by: Bjorn Andersson <andersson@kernel.org>
86 lines
2.2 KiB
C
86 lines
2.2 KiB
C
// SPDX-License-Identifier: GPL-2.0-only
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/*
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* Copyright (c) 2022, 2023 Linaro Limited
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*/
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#include <linux/clk-provider.h>
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#include <linux/err.h>
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#include <linux/kernel.h>
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#include <linux/module.h>
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#include <linux/mod_devicetable.h>
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#include <linux/platform_device.h>
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#include <linux/regmap.h>
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#include <dt-bindings/clock/qcom,sm6115-lpasscc.h>
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#include "common.h"
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#include "reset.h"
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static const struct qcom_reset_map lpass_audiocc_sm6115_resets[] = {
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[LPASS_AUDIO_SWR_RX_CGCR] = { .reg = 0x98, .bit = 1, .udelay = 500 },
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};
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static struct regmap_config lpass_audiocc_sm6115_regmap_config = {
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.reg_bits = 32,
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.reg_stride = 4,
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.val_bits = 32,
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.name = "lpass-audio-csr",
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.max_register = 0x1000,
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};
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static const struct qcom_cc_desc lpass_audiocc_sm6115_reset_desc = {
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.config = &lpass_audiocc_sm6115_regmap_config,
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.resets = lpass_audiocc_sm6115_resets,
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.num_resets = ARRAY_SIZE(lpass_audiocc_sm6115_resets),
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};
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static const struct qcom_reset_map lpasscc_sm6115_resets[] = {
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[LPASS_SWR_TX_CONFIG_CGCR] = { .reg = 0x100, .bit = 1, .udelay = 500 },
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};
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static struct regmap_config lpasscc_sm6115_regmap_config = {
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.reg_bits = 32,
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.reg_stride = 4,
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.val_bits = 32,
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.name = "lpass-tcsr",
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.max_register = 0x1000,
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};
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static const struct qcom_cc_desc lpasscc_sm6115_reset_desc = {
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.config = &lpasscc_sm6115_regmap_config,
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.resets = lpasscc_sm6115_resets,
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.num_resets = ARRAY_SIZE(lpasscc_sm6115_resets),
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};
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static const struct of_device_id lpasscc_sm6115_match_table[] = {
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{
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.compatible = "qcom,sm6115-lpassaudiocc",
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.data = &lpass_audiocc_sm6115_reset_desc,
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}, {
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.compatible = "qcom,sm6115-lpasscc",
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.data = &lpasscc_sm6115_reset_desc,
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},
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{ },
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};
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MODULE_DEVICE_TABLE(of, lpasscc_sm6115_match_table);
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static int lpasscc_sm6115_probe(struct platform_device *pdev)
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{
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const struct qcom_cc_desc *desc = of_device_get_match_data(&pdev->dev);
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return qcom_cc_probe_by_index(pdev, 0, desc);
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}
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static struct platform_driver lpasscc_sm6115_driver = {
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.probe = lpasscc_sm6115_probe,
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.driver = {
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.name = "lpasscc-sm6115",
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.of_match_table = lpasscc_sm6115_match_table,
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},
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};
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module_platform_driver(lpasscc_sm6115_driver);
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MODULE_DESCRIPTION("QTI LPASSCC SM6115 Driver");
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MODULE_LICENSE("GPL");
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