mirror of
https://gitlab.com/pulsechaincom/go-pulse.git
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1203c6a237
* crypto/bn256: full switchover to cloudflare's code * crypto/bn256: only use cloudflare for optimized architectures * crypto/bn256: upstream fallback for non-optimized code * .travis, build: drop support for Go 1.8 (need type aliases) * crypto/bn256/cloudflare: enable curve mul lattice optimization
113 lines
2.0 KiB
C
113 lines
2.0 KiB
C
#define mulBMI2(a0,a1,a2,a3, rb) \
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MOVQ a0, DX \
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MOVQ $0, R13 \
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MULXQ 0+rb, R8, R9 \
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MULXQ 8+rb, AX, R10 \
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ADDQ AX, R9 \
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MULXQ 16+rb, AX, R11 \
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ADCQ AX, R10 \
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MULXQ 24+rb, AX, R12 \
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ADCQ AX, R11 \
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ADCQ $0, R12 \
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ADCQ $0, R13 \
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\
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MOVQ a1, DX \
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MOVQ $0, R14 \
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MULXQ 0+rb, AX, BX \
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ADDQ AX, R9 \
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ADCQ BX, R10 \
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MULXQ 16+rb, AX, BX \
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ADCQ AX, R11 \
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ADCQ BX, R12 \
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ADCQ $0, R13 \
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MULXQ 8+rb, AX, BX \
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ADDQ AX, R10 \
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ADCQ BX, R11 \
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MULXQ 24+rb, AX, BX \
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ADCQ AX, R12 \
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ADCQ BX, R13 \
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ADCQ $0, R14 \
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\
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MOVQ a2, DX \
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MOVQ $0, R15 \
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MULXQ 0+rb, AX, BX \
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ADDQ AX, R10 \
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ADCQ BX, R11 \
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MULXQ 16+rb, AX, BX \
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ADCQ AX, R12 \
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ADCQ BX, R13 \
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ADCQ $0, R14 \
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MULXQ 8+rb, AX, BX \
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ADDQ AX, R11 \
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ADCQ BX, R12 \
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MULXQ 24+rb, AX, BX \
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ADCQ AX, R13 \
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ADCQ BX, R14 \
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ADCQ $0, R15 \
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\
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MOVQ a3, DX \
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MULXQ 0+rb, AX, BX \
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ADDQ AX, R11 \
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ADCQ BX, R12 \
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MULXQ 16+rb, AX, BX \
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ADCQ AX, R13 \
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ADCQ BX, R14 \
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ADCQ $0, R15 \
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MULXQ 8+rb, AX, BX \
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ADDQ AX, R12 \
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ADCQ BX, R13 \
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MULXQ 24+rb, AX, BX \
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ADCQ AX, R14 \
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ADCQ BX, R15
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#define gfpReduceBMI2() \
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\ // m = (T * N') mod R, store m in R8:R9:R10:R11
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MOVQ ·np+0(SB), DX \
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MULXQ 0(SP), R8, R9 \
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MULXQ 8(SP), AX, R10 \
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ADDQ AX, R9 \
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MULXQ 16(SP), AX, R11 \
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ADCQ AX, R10 \
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MULXQ 24(SP), AX, BX \
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ADCQ AX, R11 \
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\
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MOVQ ·np+8(SB), DX \
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MULXQ 0(SP), AX, BX \
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ADDQ AX, R9 \
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ADCQ BX, R10 \
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MULXQ 16(SP), AX, BX \
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ADCQ AX, R11 \
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MULXQ 8(SP), AX, BX \
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ADDQ AX, R10 \
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ADCQ BX, R11 \
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\
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MOVQ ·np+16(SB), DX \
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MULXQ 0(SP), AX, BX \
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ADDQ AX, R10 \
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ADCQ BX, R11 \
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MULXQ 8(SP), AX, BX \
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ADDQ AX, R11 \
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\
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MOVQ ·np+24(SB), DX \
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MULXQ 0(SP), AX, BX \
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ADDQ AX, R11 \
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\
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storeBlock(R8,R9,R10,R11, 64(SP)) \
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\
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\ // m * N
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mulBMI2(·p2+0(SB),·p2+8(SB),·p2+16(SB),·p2+24(SB), 64(SP)) \
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\
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\ // Add the 512-bit intermediate to m*N
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MOVQ $0, AX \
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ADDQ 0(SP), R8 \
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ADCQ 8(SP), R9 \
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ADCQ 16(SP), R10 \
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ADCQ 24(SP), R11 \
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ADCQ 32(SP), R12 \
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ADCQ 40(SP), R13 \
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ADCQ 48(SP), R14 \
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ADCQ 56(SP), R15 \
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ADCQ $0, AX \
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\
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gfpCarry(R12,R13,R14,R15,AX, R8,R9,R10,R11,BX)
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